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- Verilator abstract "Verilator is a free and open source software tool which converts Verilog (a hardware description language) to a cycle-accurate behavioral model in C++ or SystemC. It is restricted to modeling the synthesizable subset of Verilog and the generated models are cycle-accurate, 2-state, with synthesis (zero delay) semantics. As a consequence the models typically offer higher performance than the more widely used event driven simulators, which can process the entire Verilog language and model behavior within the clock cycle. Verilator is now used within academic research, open source projects and for commercial semiconductor development. It is part of the growing body of free EDA software.".
- Verilator genre Simulation.
- Verilator license Artistic_License.
- Verilator license GNU_Lesser_General_Public_License.
- Verilator programmingLanguage C++.
- Verilator status "Active".
- Verilator wikiPageExternalLink FedoraElectronicLab.
- Verilator wikiPageExternalLink verilator.
- Verilator wikiPageExternalLink verilator.
- Verilator wikiPageExternalLink vmodel.
- Verilator wikiPageID "21954872".
- Verilator wikiPageLength "8662".
- Verilator wikiPageOutDegree "33".
- Verilator wikiPageRevisionID "688674250".
- Verilator wikiPageWikiLink Application-specific_integrated_circuit.
- Verilator wikiPageWikiLink Artistic_License.
- Verilator wikiPageWikiLink C++.
- Verilator wikiPageWikiLink Category:Electronic_design_automation_software_for_Linux.
- Verilator wikiPageWikiLink Category:Free_electronic_design_automation_software.
- Verilator wikiPageWikiLink Comparison_of_EDA_software.
- Verilator wikiPageWikiLink Computer_architecture_simulator.
- Verilator wikiPageWikiLink Cygwin.
- Verilator wikiPageWikiLink Digital_Equipment_Corporation.
- Verilator wikiPageWikiLink Fedora_Electronic_Lab.
- Verilator wikiPageWikiLink Field-programmable_gate_array.
- Verilator wikiPageWikiLink FreeBSD.
- Verilator wikiPageWikiLink GNU_Compiler_Collection.
- Verilator wikiPageWikiLink GNU_Lesser_General_Public_License.
- Verilator wikiPageWikiLink Hardware_description_language.
- Verilator wikiPageWikiLink Linux.
- Verilator wikiPageWikiLink List_of_HDL_simulators.
- Verilator wikiPageWikiLink Logic_simulation.
- Verilator wikiPageWikiLink MEX_file.
- Verilator wikiPageWikiLink Microsoft_Windows.
- Verilator wikiPageWikiLink OpenCores.
- Verilator wikiPageWikiLink OpenRISC.
- Verilator wikiPageWikiLink Open_source.
- Verilator wikiPageWikiLink Simulation.
- Verilator wikiPageWikiLink SystemC.
- Verilator wikiPageWikiLink Verilog.
- Verilator wikiPageWikiLinkText "Verilator".
- Verilator developer "Wilson Snyder".
- Verilator genre Simulation.
- Verilator license "Perl Artistic License and GNU Lesser General Public License".
- Verilator name "Verilator".
- Verilator operatingSystem "Linux, FreeBSD, Microsoft Windows".
- Verilator programmingLanguage "C++".
- Verilator status "Active".
- Verilator wikiPageUsesTemplate Template:CAD_software.
- Verilator wikiPageUsesTemplate Template:Expand_section.
- Verilator wikiPageUsesTemplate Template:Infobox_software.
- Verilator wikiPageUsesTemplate Template:Official_website.
- Verilator wikiPageUsesTemplate Template:Reflist.
- Verilator wikiPageUsesTemplate Template:URL.
- Verilator wikiPageUsesTemplate Template:Use_dmy_dates.
- Verilator subject Category:Electronic_design_automation_software_for_Linux.
- Verilator subject Category:Free_electronic_design_automation_software.
- Verilator hypernym Tool.
- Verilator type Software.
- Verilator type Work.
- Verilator type CreativeWork.
- Verilator type Thing.
- Verilator type Q386724.
- Verilator type Q7397.
- Verilator comment "Verilator is a free and open source software tool which converts Verilog (a hardware description language) to a cycle-accurate behavioral model in C++ or SystemC. It is restricted to modeling the synthesizable subset of Verilog and the generated models are cycle-accurate, 2-state, with synthesis (zero delay) semantics.".
- Verilator label "Verilator".
- Verilator sameAs Q7921335.
- Verilator sameAs m.05p3vfk.
- Verilator sameAs Q7921335.
- Verilator wasDerivedFrom Verilator?oldid=688674250.
- Verilator homepage verilator.
- Verilator homepage verilator.
- Verilator isPrimaryTopicOf Verilator.
- Verilator name "Verilator".