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- TILEPro64 abstract "TILEPro64 is a multicore processor (Tile processor) manufactured by Tilera. It consists of a cache-coherent mesh network of 64 \"tiles\", where each tile houses a general purpose processor, cache, and a non-blocking router, which the tile uses to communicate with the other tiles on the processor. The short-pipeline, in-order, three-issue cores implement a VLIW instruction set. Each core has a register file and three functional units: two integer arithmetic logic units and a load-store unit. Each of the cores (\"tile\") has its own L1 and L2 caches plus an overall virtual L3 cache which is an aggregate of all the L2 caches. A core is able to run a full operating system on its own or multiple cores can be used to run a symmetrical multi-processing operating system.TILEPro64 has four DDR2 controllers at up to 800MT/s, two 10-gigabit Ethernet XAUI interfaces, two four-lane PCIe interfaces, and a \"flexible\" input/output interface, which can be software-configured to handle a number of protocols. The processor is fabricated using a 90 nm process and runs at speeds of 600 to 866 MHz.According to the company, Tilera targets the chip at networking equipment, digital video, and wireless infrastructure markets where the demands for computing processing are high. More recently, Tilera has positioned this processor in the cloud computing space with an 8-processor (512-core) 2U server built by Quanta Computer.TILEPro is supported by the Linux kernel since version 2.6.36.".
- TILEPro64 thumbnail Tilera_TILEPro64_BlockDiagram.JPG?width=300.
- TILEPro64 wikiPageExternalLink 2.
- TILEPro64 wikiPageExternalLink tilera_cpu_upgrade.
- TILEPro64 wikiPageExternalLink processors.php.
- TILEPro64 wikiPageID "29389039".
- TILEPro64 wikiPageLength "4995".
- TILEPro64 wikiPageOutDegree "31".
- TILEPro64 wikiPageRevisionID "563671106".
- TILEPro64 wikiPageWikiLink 6WIND.
- TILEPro64 wikiPageWikiLink 90_nanometer.
- TILEPro64 wikiPageWikiLink Arithmetic_logic_unit.
- TILEPro64 wikiPageWikiLink CPU_cache.
- TILEPro64 wikiPageWikiLink Cache_coherence.
- TILEPro64 wikiPageWikiLink Category:Microprocessors.
- TILEPro64 wikiPageWikiLink DDR2_SDRAM.
- TILEPro64 wikiPageWikiLink Ethernet.
- TILEPro64 wikiPageWikiLink Instruction_set.
- TILEPro64 wikiPageWikiLink Kilobyte.
- TILEPro64 wikiPageWikiLink Linux_kernel.
- TILEPro64 wikiPageWikiLink Load-store.
- TILEPro64 wikiPageWikiLink Media-independent_interface.
- TILEPro64 wikiPageWikiLink Memory_controller.
- TILEPro64 wikiPageWikiLink Mesh_networking.
- TILEPro64 wikiPageWikiLink Microprocessor.
- TILEPro64 wikiPageWikiLink Multi-core_processor.
- TILEPro64 wikiPageWikiLink PCI_Express.
- TILEPro64 wikiPageWikiLink Pipeline_(computing).
- TILEPro64 wikiPageWikiLink Processor_register.
- TILEPro64 wikiPageWikiLink Router_(computing).
- TILEPro64 wikiPageWikiLink TILE64.
- TILEPro64 wikiPageWikiLink Tile_processor.
- TILEPro64 wikiPageWikiLink Tilera.
- TILEPro64 wikiPageWikiLink Very_long_instruction_word.
- TILEPro64 wikiPageWikiLink XAUI.
- TILEPro64 wikiPageWikiLink File:TILEPro64_TileBlock.JPG.
- TILEPro64 wikiPageWikiLink File:Tilera_TILEPro64_BlockDiagram.JPG.
- TILEPro64 wikiPageWikiLinkText "TILE''Pro''64".
- TILEPro64 wikiPageWikiLinkText "TILEPro64".
- TILEPro64 fastUnit "MHz".
- TILEPro64 fastest "866".
- TILEPro64 manuf Tilera.
- TILEPro64 name "TILEPro64".
- TILEPro64 numcores "64".
- TILEPro64 producedStart "2008".
- TILEPro64 sizeFrom "90.0".
- TILEPro64 slowUnit "MHz".
- TILEPro64 slowest "600".
- TILEPro64 wikiPageUsesTemplate Template:Infobox_CPU.
- TILEPro64 subject Category:Microprocessors.
- TILEPro64 hypernym Processor.
- TILEPro64 type Software.
- TILEPro64 type Circuit.
- TILEPro64 comment "TILEPro64 is a multicore processor (Tile processor) manufactured by Tilera. It consists of a cache-coherent mesh network of 64 \"tiles\", where each tile houses a general purpose processor, cache, and a non-blocking router, which the tile uses to communicate with the other tiles on the processor. The short-pipeline, in-order, three-issue cores implement a VLIW instruction set. Each core has a register file and three functional units: two integer arithmetic logic units and a load-store unit.".
- TILEPro64 label "TILEPro64".
- TILEPro64 sameAs Q7670389.
- TILEPro64 sameAs m.0dsdy3r.
- TILEPro64 sameAs Q7670389.
- TILEPro64 wasDerivedFrom TILEPro64?oldid=563671106.
- TILEPro64 depiction Tilera_TILEPro64_BlockDiagram.JPG.
- TILEPro64 isPrimaryTopicOf TILEPro64.