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- Quad_data_rate abstract "Quad data rate (QDR, or quad pumping) is a communication signaling technique wherein data are transmitted at four points in the clock cycle: on the rising and falling edges, and at two intermediate points between them. The intermediate points are defined by a second clock that is 90° out of phase from the first. The effect is to deliver four bits of data per signal line per clock cycle.In a quad data rate system, the data lines operate at twice the frequency of the clock signal. This is in contrast to double data rate systems, in which the clock and data lines operate at the same frequency.Quad data rate technology was introduced by Intel in its Willamette-core Pentium 4 processor, and was subsequently employed in its Atom, Pentium 4, Celeron, Pentium D and Core 2 processor ranges. This technology has allowed Intel to produce chipsets and processors that can communicate with each other at data rates expected of the traditional front side bus (FSB) technology running from 400 MT/s to 1600 MT/s, while maintaining a lower and thus more stable actual clock frequency of 100 MHz to 400 MHz.".
- Quad_data_rate thumbnail SDR_DDR_QDR.svg?width=300.
- Quad_data_rate wikiPageID "11284769".
- Quad_data_rate wikiPageLength "3956".
- Quad_data_rate wikiPageOutDegree "19".
- Quad_data_rate wikiPageRevisionID "704610163".
- Quad_data_rate wikiPageWikiLink Category:Digital_electronics.
- Quad_data_rate wikiPageWikiLink Celeron.
- Quad_data_rate wikiPageWikiLink Central_processing_unit.
- Quad_data_rate wikiPageWikiLink Double_data_rate.
- Quad_data_rate wikiPageWikiLink Front-side_bus.
- Quad_data_rate wikiPageWikiLink output.
- Quad_data_rate wikiPageWikiLink Intel.
- Quad_data_rate wikiPageWikiLink Intel_Atom.
- Quad_data_rate wikiPageWikiLink Intel_Core_2.
- Quad_data_rate wikiPageWikiLink Pentium_4.
- Quad_data_rate wikiPageWikiLink Pentium_D.
- Quad_data_rate wikiPageWikiLink Phase_(waves).
- Quad_data_rate wikiPageWikiLink Pumping_(computer_systems).
- Quad_data_rate wikiPageWikiLink Single_data_rate.
- Quad_data_rate wikiPageWikiLink Transfer_(computing).
- Quad_data_rate wikiPageWikiLink File:Quad_Pumping.png.
- Quad_data_rate wikiPageWikiLink File:SDR_DDR_QDR.svg.
- Quad_data_rate wikiPageWikiLinkText "QDR".
- Quad_data_rate wikiPageWikiLinkText "Quad data rate".
- Quad_data_rate wikiPageWikiLinkText "quad pumping".
- Quad_data_rate wikiPageUsesTemplate Template:Compu-hardware-stub.
- Quad_data_rate wikiPageUsesTemplate Template:Portal.
- Quad_data_rate wikiPageUsesTemplate Template:Reflist.
- Quad_data_rate subject Category:Digital_electronics.
- Quad_data_rate hypernym Communication.
- Quad_data_rate type Agent.
- Quad_data_rate comment "Quad data rate (QDR, or quad pumping) is a communication signaling technique wherein data are transmitted at four points in the clock cycle: on the rising and falling edges, and at two intermediate points between them. The intermediate points are defined by a second clock that is 90° out of phase from the first. The effect is to deliver four bits of data per signal line per clock cycle.In a quad data rate system, the data lines operate at twice the frequency of the clock signal.".
- Quad_data_rate label "Quad data rate".
- Quad_data_rate sameAs Q1408949.
- Quad_data_rate sameAs Quad_Pumped_Bus.
- Quad_data_rate sameAs Quad_Data_Rate.
- Quad_data_rate sameAs Quad_data_rate.
- Quad_data_rate sameAs Quad_pumped.
- Quad_data_rate sameAs Quad_data_rate.
- Quad_data_rate sameAs m.02r69gj.
- Quad_data_rate sameAs Техника_четири_трансфера_по_циклусу.
- Quad_data_rate sameAs Q1408949.
- Quad_data_rate wasDerivedFrom Quad_data_rate?oldid=704610163.
- Quad_data_rate depiction SDR_DDR_QDR.svg.
- Quad_data_rate isPrimaryTopicOf Quad_data_rate.