Matches in DBpedia 2016-04 for { <http://dbpedia.org/resource/PowerPC_e5500> ?p ?o }
Showing triples 1 to 53 of
53
with 100 triples per page.
- PowerPC_e5500 abstract "The PowerPC e5500 is a 64-bit Power Architecture-based microprocessor core from Freescale Semiconductor. The core implements most of the core of the Power ISA v.2.06 with hypervisor support, but not AltiVec. It has a four issue, seven-stage out-of-order pipeline with a double precision FPU, three Integer units, 32/32 KB data and instruction L1 caches, 512 KB private L2 cache per core and up to 2 MB shared L3 cache. Speeds range up to 2.5 GHz, and the core is designed to be highly configurable via the CoreNet fabric and meet the specific needs of embedded applications with features like multi-core operation and interface for auxiliary application processing units (APU).".
- PowerPC_e5500 wikiPageExternalLink phoenix.zhtml?c=196520&p=irol-newsArticle_print&ID=1440425.
- PowerPC_e5500 wikiPageExternalLink 64BTTCHNLGYWP.pdf.
- PowerPC_e5500 wikiPageID "27825850".
- PowerPC_e5500 wikiPageLength "3438".
- PowerPC_e5500 wikiPageOutDegree "31".
- PowerPC_e5500 wikiPageRevisionID "639358166".
- PowerPC_e5500 wikiPageWikiLink 64-bit_computing.
- PowerPC_e5500 wikiPageWikiLink AltiVec.
- PowerPC_e5500 wikiPageWikiLink Arithmetic_logic_unit.
- PowerPC_e5500 wikiPageWikiLink BAE_Systems.
- PowerPC_e5500 wikiPageWikiLink CPU_cache.
- PowerPC_e5500 wikiPageWikiLink Category:Freescale_microprocessors.
- PowerPC_e5500 wikiPageWikiLink Category:PowerPC_microprocessors.
- PowerPC_e5500 wikiPageWikiLink Double-precision_floating-point_format.
- PowerPC_e5500 wikiPageWikiLink Embedded_system.
- PowerPC_e5500 wikiPageWikiLink Floating-point_unit.
- PowerPC_e5500 wikiPageWikiLink Freescale_Semiconductor.
- PowerPC_e5500 wikiPageWikiLink Hypervisor.
- PowerPC_e5500 wikiPageWikiLink IEEE_floating_point.
- PowerPC_e5500 wikiPageWikiLink Instruction_pipelining.
- PowerPC_e5500 wikiPageWikiLink Microprocessor.
- PowerPC_e5500 wikiPageWikiLink Multi-core_processor.
- PowerPC_e5500 wikiPageWikiLink Out-of-order_execution.
- PowerPC_e5500 wikiPageWikiLink PowerPC_e500.
- PowerPC_e5500 wikiPageWikiLink PowerPC_e600.
- PowerPC_e5500 wikiPageWikiLink PowerPC_e6500.
- PowerPC_e5500 wikiPageWikiLink PowerPC_e700.
- PowerPC_e5500 wikiPageWikiLink Power_Architecture.
- PowerPC_e5500 wikiPageWikiLink QorIQ.
- PowerPC_e5500 wikiPageWikiLink RAD5500.
- PowerPC_e5500 wikiPageWikiLink Radiation_hardening.
- PowerPC_e5500 wikiPageWikiLink System_on_a_chip.
- PowerPC_e5500 wikiPageWikiLinkText "PowerPC e5500".
- PowerPC_e5500 wikiPageWikiLinkText "PowerPC e5500".
- PowerPC_e5500 wikiPageWikiLinkText "e5500 core".
- PowerPC_e5500 wikiPageWikiLinkText "e5500 core(s)".
- PowerPC_e5500 wikiPageWikiLinkText "e5500 cores".
- PowerPC_e5500 wikiPageWikiLinkText "e5500".
- PowerPC_e5500 wikiPageUsesTemplate Template:Motorola_processors.
- PowerPC_e5500 wikiPageUsesTemplate Template:Power_Architecture.
- PowerPC_e5500 wikiPageUsesTemplate Template:Reflist.
- PowerPC_e5500 subject Category:Freescale_microprocessors.
- PowerPC_e5500 subject Category:PowerPC_microprocessors.
- PowerPC_e5500 hypernym Core.
- PowerPC_e5500 type Place.
- PowerPC_e5500 comment "The PowerPC e5500 is a 64-bit Power Architecture-based microprocessor core from Freescale Semiconductor. The core implements most of the core of the Power ISA v.2.06 with hypervisor support, but not AltiVec. It has a four issue, seven-stage out-of-order pipeline with a double precision FPU, three Integer units, 32/32 KB data and instruction L1 caches, 512 KB private L2 cache per core and up to 2 MB shared L3 cache.".
- PowerPC_e5500 label "PowerPC e5500".
- PowerPC_e5500 sameAs Q7236215.
- PowerPC_e5500 sameAs m.0cc5tss.
- PowerPC_e5500 sameAs Q7236215.
- PowerPC_e5500 wasDerivedFrom PowerPC_e5500?oldid=639358166.
- PowerPC_e5500 isPrimaryTopicOf PowerPC_e5500.