Matches in DBpedia 2016-04 for { <http://dbpedia.org/resource/OpenRISC> ?p ?o }
- OpenRISC abstract "OpenRISC is a project to develop a series of open source instruction set architectures based on established reduced instruction set computing (RISC) principles. It is the original flagship project of the OpenCores communityThe first (and currently only) architectural description is for the OpenRISC 1000, describing a family of 32 and 64-bit processors with optional floating point and vector processing support, and the OpenRISC 1200 implementation of this was designed by Damjan Lampret in 2000, written in the Verilog hardware description language.The hardware design was released under the GNU Lesser General Public License (LGPL), while the models and firmware were released under the GNU General Public License (GPL).A reference SoC implementation based on the OpenRISC 1200 was developed, known as ORPSoC (the OpenRISC Reference Platform System-on-Chip). A number of groups have demonstrated ORPSoC and other OR1200 based designs running on FPGAs, and there have been a number of commercial derivatives produced.".
- OpenRISC thumbnail OpenRISC_prototyped_on_Flextronics_FPGA_dev_board._Running_uClinux.jpg?width=300.
- OpenRISC wikiPageExternalLink 25HarvJLTech131.pdf.
- OpenRISC wikiPageExternalLink www.beyondsemi.com.
- OpenRISC wikiPageExternalLink www.dynalith.com.
- OpenRISC wikiPageExternalLink OEG20000228S0007.
- OpenRISC wikiPageExternalLink www.imperas.com.
- OpenRISC wikiPageExternalLink www.jennic.com.
- OpenRISC wikiPageExternalLink ?id=wallentowitz.
- OpenRISC wikiPageExternalLink openrisc-1200-soft-processor.
- OpenRISC wikiPageExternalLink llvm-or1k.
- OpenRISC wikiPageExternalLink wiki.
- OpenRISC wikiPageExternalLink openrisc.github.io.
- OpenRISC wikiPageExternalLink www.flextronics.com.
- OpenRISC wikiPageID "411760".
- OpenRISC wikiPageLength "11379".
- OpenRISC wikiPageOutDegree "60".
- OpenRISC wikiPageRevisionID "708046822".
- OpenRISC wikiPageWikiLink ARM_architecture.
- OpenRISC wikiPageWikiLink Accellera.
- OpenRISC wikiPageWikiLink Amber_(processor_core).
- OpenRISC wikiPageWikiLink Application-specific_integrated_circuit.
- OpenRISC wikiPageWikiLink C++.
- OpenRISC wikiPageWikiLink C_(programming_language).
- OpenRISC wikiPageWikiLink Cadence_Design_Systems.
- OpenRISC wikiPageWikiLink Category:Embedded_microprocessors.
- OpenRISC wikiPageWikiLink Category:Open_microprocessors.
- OpenRISC wikiPageWikiLink ECos.
- OpenRISC wikiPageWikiLink EE_Times.
- OpenRISC wikiPageWikiLink Fabless_manufacturing.
- OpenRISC wikiPageWikiLink Field-programmable_gate_array.
- OpenRISC wikiPageWikiLink Flextronics.
- OpenRISC wikiPageWikiLink FreeRTOS.
- OpenRISC wikiPageWikiLink GNU_C_Library.
- OpenRISC wikiPageWikiLink GNU_General_Public_License.
- OpenRISC wikiPageWikiLink GNU_Lesser_General_Public_License.
- OpenRISC wikiPageWikiLink GNU_toolchain.
- OpenRISC wikiPageWikiLink Hardware_description_language.
- OpenRISC wikiPageWikiLink Instruction_set.
- OpenRISC wikiPageWikiLink Instruction_set_simulator.
- OpenRISC wikiPageWikiLink Jennic.
- OpenRISC wikiPageWikiLink LEON.
- OpenRISC wikiPageWikiLink LLVM.
- OpenRISC wikiPageWikiLink LatticeMico32.
- OpenRISC wikiPageWikiLink Linux.
- OpenRISC wikiPageWikiLink Linux_kernel.
- OpenRISC wikiPageWikiLink MIPS_instruction_set.
- OpenRISC wikiPageWikiLink Multi-core_processor.
- OpenRISC wikiPageWikiLink Musl.
- OpenRISC wikiPageWikiLink NASA.
- OpenRISC wikiPageWikiLink Newlib.
- OpenRISC wikiPageWikiLink OSHUG.
- OpenRISC wikiPageWikiLink OVPsim.
- OpenRISC wikiPageWikiLink OpenCores.
- OpenRISC wikiPageWikiLink OpenRISC_1200.
- OpenRISC wikiPageWikiLink OpenSPARC.
- OpenRISC wikiPageWikiLink Open_source.
- OpenRISC wikiPageWikiLink QEMU.
- OpenRISC wikiPageWikiLink RISC-V.
- OpenRISC wikiPageWikiLink RTEMS.
- OpenRISC wikiPageWikiLink Real-time_operating_system.
- OpenRISC wikiPageWikiLink Reduced_instruction_set_computing.
- OpenRISC wikiPageWikiLink Register-transfer_level.
- OpenRISC wikiPageWikiLink SIMD.
- OpenRISC wikiPageWikiLink SystemC.
- OpenRISC wikiPageWikiLink System_on_a_chip.
- OpenRISC wikiPageWikiLink TechEdSat.
- OpenRISC wikiPageWikiLink Technische_Universität_München.
- OpenRISC wikiPageWikiLink UClibc.
- OpenRISC wikiPageWikiLink Verilog.
- OpenRISC wikiPageWikiLink Wayland_(display_server_protocol).
- OpenRISC wikiPageWikiLink X_Window_System.
- OpenRISC wikiPageWikiLink File:OpenRISC_prototyped_on_Flextronics_FPGA_dev_board._Running_uClinux.jpg.
- OpenRISC wikiPageWikiLinkText "OpenRISC 1000".
- OpenRISC wikiPageWikiLinkText "OpenRISC family".
- OpenRISC wikiPageWikiLinkText "OpenRISC".
- OpenRISC wikiPageWikiLinkText "OpenRisc".
- OpenRISC bits "32".
- OpenRISC design "RISC".
- OpenRISC designer "Damjan Lampret, with contributions from others in the OpenRISC community".
- OpenRISC encoding "Fixed".
- OpenRISC fpr "Optional".
- OpenRISC gpr "16".
- OpenRISC name "OpenRISC".
- OpenRISC open "Yes".
- OpenRISC wikiPageUsesTemplate Template:Infobox_CPU_architecture.
- OpenRISC wikiPageUsesTemplate Template:Official_website.
- OpenRISC wikiPageUsesTemplate Template:Portal.
- OpenRISC wikiPageUsesTemplate Template:Programmable_Logic.
- OpenRISC wikiPageUsesTemplate Template:RISC-based_processor_architectures.
- OpenRISC wikiPageUsesTemplate Template:Soft_microprocessors.
- OpenRISC subject Category:Embedded_microprocessors.
- OpenRISC subject Category:Open_microprocessors.
- OpenRISC hypernym Project.
- OpenRISC type Band.
- OpenRISC comment "OpenRISC is a project to develop a series of open source instruction set architectures based on established reduced instruction set computing (RISC) principles.".
- OpenRISC label "OpenRISC".
- OpenRISC sameAs Q1092481.
- OpenRISC sameAs OpenRISC.
- OpenRISC sameAs OpenRISC.