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• Burroughs_B6x00-7x00_instruction_set abstract "The Burroughs B6x00-7x00 instruction set includes the set of valid operations for the Burroughs B6500, B7500 and later Burroughs large systems instruction sets include the set of valid operations for the Burroughs B5000, B5500, and B5700 computers and the set of valid operations for the Burroughs B6500 and later, including the current (as of 2006) Unisys Clearpath/MCP systems; it does not include the instruction for other Burroughs large systems including the B5000, B5500, B5700 and the B8500. These unique machines have a distinctive design and instruction set. Each word of data is associated with a type, and the effect of an operation on that word can depend on the type. Further, the machines are stack based to the point that they had no user-addressable registers.As you would expect from the description of the run-time data structures used in these systems, they also have an interesting instruction set. Programs are made up of 8-bit syllabels, which may be Name Call, be Value Call or form an operator, which may be from one to twelve syllables in length. There are less than 200 operators, all of which fit into 8-bit \"syllables.\" Many of these operators are polymorphic depending on the kind of data being acted on as given by the tag. If we ignore the powerful string scanning, transfer, and edit operators, the basic set is only about 120 operators. If we remove the operators reserved for the operating system such as MVST and HALT, the set of operators commonly used by user-level programs is less than 100. The Name Call and Value Call syllables contain address couples; the Operator syllables either use no addresses or use control words and descriptors on the stack.Since there are no programmer-addressable registers, most of the register manipulating operations required in other architectures are not needed, nor are variants for performing operations between pairs of registers, since all operations are applied to the top of the stack. This also makes code files very compact, since operators are zero-address and do not need to include the address of registers or memory locations in the code stream.For example the B5000 has only one ADD operator. Typical architectures require multiple operators for each data type, for example add.i, add.f, add.d, add.l for integer, float, double, and long data types. The architecture only distinguishes single and double precision numbers – integers are just reals with a zero exponent. When one or both of the operands has a tag of 2, a double precision add is performed, otherwise tag 0 indicates single precision. Thus the tag itself is the equivalent of the operator .i, .f, .d, and .l extension. This also means that the code and data can never be mismatched.Two operators are important in the handling of on-stack data – VALC and NAMC. These are two-bit operators, 00 being VALC, value call, and 01 being NAMC, name call. The following six bits of the syllable, concatenated with the following syllable, provide the address couple. Thus VALC covers syllable values 0000 to 3FFF and NAMC 4000 to 7FFF.VALC is another polymorphic operator. If it hits a data word, that word is loaded to the top of stack. If it hits an IRW, that is followed, possibly in a chain of IRWs until a data word is found. If a PCW is found, then a function is entered to compute the value and the VALC does not complete until the function returns.NAMC simply loads the address couple onto the top of the stack as an IRW (with the tag automatically set to 1).Static branches (BRUN, BRFL, and BRTR) used two additional syllables of offset. Thus arithmetic operations occupied one syllable, addressing operations (NAMC and VALC) occupied two, branches three, and long literals (LT48) five. As a result, code was much denser (had better entropy) than a conventional RISC architecture in which each operation occupies four bytes. Better code density meant fewer instruction cache misses and hence better performance running large-scale code. In the following operator explanations remember that A and B are the top two stack registers. Double precision extensions are provided by the X and Y registers; thus the top two double precision operands are given by AX and BY. (Mostly AX and BY is implied by just A and B.)".
• Burroughs_B6x00-7x00_instruction_set wikiPageID "1448012".
• Burroughs_B6x00-7x00_instruction_set wikiPageLength "18533".
• Burroughs_B6x00-7x00_instruction_set wikiPageOutDegree "19".
• Burroughs_B6x00-7x00_instruction_set wikiPageRevisionID "705826899".
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Buffer_overflow.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Burroughs_large_systems.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Call_stack.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Category:Instruction_processing.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Category:Instruction_set_architectures.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Category:Instruction_set_listings.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Compiler.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Data_structure.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Exponentiation.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Instruction_set.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Integer.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Operand.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Operator_(computer_programming).
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Polymorphism_(computer_science).
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Processor_register.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink String_(computer_science).
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Unisys.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLink Word.
• Burroughs_B6x00-7x00_instruction_set wikiPageWikiLinkText "Burroughs B6x00-7x00 instruction set".
• Burroughs_B6x00-7x00_instruction_set date "April 2013".
• Burroughs_B6x00-7x00_instruction_set reason "Lead isn't comfortable to navigate through".
• Burroughs_B6x00-7x00_instruction_set wikiPageUsesTemplate Template:Cleanup.
• Burroughs_B6x00-7x00_instruction_set wikiPageUsesTemplate Template:Unreferenced.
• Burroughs_B6x00-7x00_instruction_set subject Category:Instruction_processing.
• Burroughs_B6x00-7x00_instruction_set subject Category:Instruction_set_architectures.
• Burroughs_B6x00-7x00_instruction_set subject Category:Instruction_set_listings.
• Burroughs_B6x00-7x00_instruction_set type Architecture.
• Burroughs_B6x00-7x00_instruction_set type Page.
• Burroughs_B6x00-7x00_instruction_set type Redirect.
• Burroughs_B6x00-7x00_instruction_set type Architecture.
• Burroughs_B6x00-7x00_instruction_set comment "The Burroughs B6x00-7x00 instruction set includes the set of valid operations for the Burroughs B6500, B7500 and later Burroughs large systems instruction sets include the set of valid operations for the Burroughs B5000, B5500, and B5700 computers and the set of valid operations for the Burroughs B6500 and later, including the current (as of 2006) Unisys Clearpath/MCP systems; it does not include the instruction for other Burroughs large systems including the B5000, B5500, B5700 and the B8500.".
• Burroughs_B6x00-7x00_instruction_set label "Burroughs B6x00-7x00 instruction set".
• Burroughs_B6x00-7x00_instruction_set sameAs Q5000490.
• Burroughs_B6x00-7x00_instruction_set sameAs m.052c6v.
• Burroughs_B6x00-7x00_instruction_set sameAs Q5000490.
• Burroughs_B6x00-7x00_instruction_set wasDerivedFrom Burroughs_B6x00-7x00_instruction_set?oldid=705826899.
• Burroughs_B6x00-7x00_instruction_set isPrimaryTopicOf Burroughs_B6x00-7x00_instruction_set.