Matches in DBpedia 2015-10 for { <http://dbpedia.org/resource/Verilog> ?p ?o }
- Verilog abstract "Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is also used in the verification of analog circuits and mixed-signal circuits.".
- Verilog influenced SystemVerilog.
- Verilog latestReleaseVersion "IEEE1364-2005".
- Verilog wikiPageExternalLink systemde.htm.
- Verilog wikiPageExternalLink opac?punumber=10779.
- Verilog wikiPageExternalLink coding_and_synthesis_with_verilog.pdf.
- Verilog wikiPageExternalLink parallel.cc.
- Verilog wikiPageExternalLink verilog_2001_ref_guide.pdf.
- Verilog wikiPageExternalLink verilog.php.
- Verilog wikiPageExternalLink verilog.renerta.com.
- Verilog wikiPageExternalLink verilog.php.
- Verilog wikiPageExternalLink index.html.
- Verilog wikiPageExternalLink sv-ieee1800.
- Verilog wikiPageExternalLink www.edaplayground.com.
- Verilog wikiPageExternalLink www.edautils.com.
- Verilog wikiPageExternalLink verilog.html.
- Verilog wikiPageExternalLink ebnftools.html.
- Verilog wikiPageExternalLink verilog_tutorial.htm.
- Verilog wikiPageExternalLink verilog_ver_2.5_.ppsx.
- Verilog wikiPageExternalLink verilog_ver_2.5_.pdf.
- Verilog wikiPageExternalLink www.ovi.org.
- Verilog wikiPageExternalLink verilog_01.php.
- Verilog wikiPageExternalLink vlog_ref_top.html.
- Verilog wikiPageExternalLink IEEEVerilog.html.
- Verilog wikiPageExternalLink VerilogBNF.html.
- Verilog wikiPageExternalLink verilog-ams.
- Verilog wikiPageExternalLink verilog-mode.
- Verilog wikiPageExternalLink watch?v=eXb8prknDKg&list=SPScWdLzHpkAfbPhzz1NKHDv2clv1SgsMo&index=1&hd=1.
- Verilog wikiPageExternalLink watch?v=wlZQgeIlSnU&index=1&list=PLo7bVbJhQ6qxesicBHQwSl4nYOMJO2CHw.
- Verilog wikiPageID "63863".
- Verilog wikiPageLength "32793".
- Verilog wikiPageOutDegree "96".
- Verilog wikiPageRevisionID "682475402".
- Verilog wikiPageWikiLink %22Hello,_World!%22_program.
- Verilog wikiPageWikiLink Abstraction_(computer_science).
- Verilog wikiPageWikiLink Accellera.
- Verilog wikiPageWikiLink Analogue_electronics.
- Verilog wikiPageWikiLink Application-specific_integrated.
- Verilog wikiPageWikiLink Arithmetic_shift.
- Verilog wikiPageWikiLink Backus-Naur_form.
- Verilog wikiPageWikiLink Backus–Naur_Form.
- Verilog wikiPageWikiLink Bitstream.
- Verilog wikiPageWikiLink C_(programming_language).
- Verilog wikiPageWikiLink Cadence_Design_Systems.
- Verilog wikiPageWikiLink Case-sensitive.
- Verilog wikiPageWikiLink Case_sensitivity.
- Verilog wikiPageWikiLink Category:Articles_with_example_code.
- Verilog wikiPageWikiLink Category:Hardware_description_languages.
- Verilog wikiPageWikiLink Category:IEC_standards.
- Verilog wikiPageWikiLink Category:IEEE_DASC_standards.
- Verilog wikiPageWikiLink Co-Design_Automation_Inc.
- Verilog wikiPageWikiLink Control_flow.
- Verilog wikiPageWikiLink Counter_(digital).
- Verilog wikiPageWikiLink Dataflow_language.
- Verilog wikiPageWikiLink Dataflow_programming.
- Verilog wikiPageWikiLink Debugger.
- Verilog wikiPageWikiLink Deprecated.
- Verilog wikiPageWikiLink Deprecation.
- Verilog wikiPageWikiLink Digital_electronics.
- Verilog wikiPageWikiLink E_(verification_language).
- Verilog wikiPageWikiLink Electronic_circuit_simulation.
- Verilog wikiPageWikiLink Electronic_design_automation.
- Verilog wikiPageWikiLink FPGA.
- Verilog wikiPageWikiLink Field-programmable_gate_array.
- Verilog wikiPageWikiLink Flip-flop_(electronics).
- Verilog wikiPageWikiLink Four-valued_logic.
- Verilog wikiPageWikiLink Gateway_Design_Automation.
- Verilog wikiPageWikiLink Hardware_description_language.
- Verilog wikiPageWikiLink Hardware_verification_language.
- Verilog wikiPageWikiLink Hello_world_program.
- Verilog wikiPageWikiLink High_impedance.
- Verilog wikiPageWikiLink IEEE.
- Verilog wikiPageWikiLink IEEE_1164.
- Verilog wikiPageWikiLink Institute_of_Electrical_and_Electronics_Engineers.
- Verilog wikiPageWikiLink Instruction_set_simulator.
- Verilog wikiPageWikiLink JHDL.
- Verilog wikiPageWikiLink Keyword_(computer_programming).
- Verilog wikiPageWikiLink List_of_HDL_simulators.
- Verilog wikiPageWikiLink List_of_Verilog_simulators.
- Verilog wikiPageWikiLink Logic_simulation.
- Verilog wikiPageWikiLink Logic_simulator.
- Verilog wikiPageWikiLink Logic_synthesis.
- Verilog wikiPageWikiLink Logical_shift.
- Verilog wikiPageWikiLink Mask_set.
- Verilog wikiPageWikiLink Microcontroller.
- Verilog wikiPageWikiLink Mixed-signal_integrated_circuit.
- Verilog wikiPageWikiLink MyHDL.
- Verilog wikiPageWikiLink Netlist.
- Verilog wikiPageWikiLink OpenVera.
- Verilog wikiPageWikiLink Operator_precedence.
- Verilog wikiPageWikiLink Order_of_operations.
- Verilog wikiPageWikiLink Phil_Moorby.
- Verilog wikiPageWikiLink Prabhu_Goel.
- Verilog wikiPageWikiLink Preprocessor.
- Verilog wikiPageWikiLink Programming_language.
- Verilog wikiPageWikiLink Property_Specification_Language.
- Verilog wikiPageWikiLink Python_(programming_language).
- Verilog wikiPageWikiLink Register-transfer_level.
- Verilog wikiPageWikiLink Reserved_word.
- Verilog wikiPageWikiLink Rule_of_thumb.