Matches in DBpedia 2015-10 for { <http://dbpedia.org/resource/Reconvergent_fan-out> ?p ?o }
Showing triples 1 to 30 of
30
with 100 triples per page.
- Reconvergent_fan-out abstract "Reconvergent fan-out is a technique to make VLSI logic simulation less pessimistic.Static timing analysis tries to figure out the best and worst case time estimate for each signal as they pass through an electronic device. Whenever a signal passes through a node, a bit of uncertainty must be added to the time required for the signal to transit that device. These uncertain delays add up so, after passing through many devices, the worst-case timing for a signal will could be unreasonably pessimistic.It is common for two signals to share an identical path, branch and follow different paths for a while, then converge back to the same point to produce a result. When this happens, you can remove a fair amount of uncertainty from the total delay because you know that they shared a common path for a while. Even though each signal has an uncertain delay, because their delays were identical for part of the journey the total uncertainty can be reduced. This tightens up the worst-case estimation for the signal delay, and usually allows a small but important speedup of the overall device.This term is starting to be used in a more generic sense as well. Any time a signal splits into two and then reconverges, certain optimizations can be made. The term reconvergent fan-out has been used to describe similar optimizations in graph theory and static code analysis.".
- Reconvergent_fan-out wikiPageExternalLink syn_time_analysis.htm.
- Reconvergent_fan-out wikiPageID "7762220".
- Reconvergent_fan-out wikiPageLength "1644".
- Reconvergent_fan-out wikiPageOutDegree "9".
- Reconvergent_fan-out wikiPageRevisionID "681489141".
- Reconvergent_fan-out wikiPageWikiLink Best,_worst_and_average_case.
- Reconvergent_fan-out wikiPageWikiLink Category:Logic_gates.
- Reconvergent_fan-out wikiPageWikiLink Fan-in.
- Reconvergent_fan-out wikiPageWikiLink Fan-out.
- Reconvergent_fan-out wikiPageWikiLink Graph_theory.
- Reconvergent_fan-out wikiPageWikiLink Logic_simulation.
- Reconvergent_fan-out wikiPageWikiLink Static_code_analysis.
- Reconvergent_fan-out wikiPageWikiLink Static_program_analysis.
- Reconvergent_fan-out wikiPageWikiLink Static_timing_analysis.
- Reconvergent_fan-out wikiPageWikiLink Very-large-scale_integration.
- Reconvergent_fan-out wikiPageWikiLink Worst_case.
- Reconvergent_fan-out wikiPageWikiLinkText "Reconvergent fan-out".
- Reconvergent_fan-out hasPhotoCollection Reconvergent_fan-out.
- Reconvergent_fan-out subject Category:Logic_gates.
- Reconvergent_fan-out hypernym Technique.
- Reconvergent_fan-out type Software.
- Reconvergent_fan-out type Circuit.
- Reconvergent_fan-out comment "Reconvergent fan-out is a technique to make VLSI logic simulation less pessimistic.Static timing analysis tries to figure out the best and worst case time estimate for each signal as they pass through an electronic device. Whenever a signal passes through a node, a bit of uncertainty must be added to the time required for the signal to transit that device.".
- Reconvergent_fan-out label "Reconvergent fan-out".
- Reconvergent_fan-out sameAs m.026c5ys.
- Reconvergent_fan-out sameAs Q7302804.
- Reconvergent_fan-out sameAs Q7302804.
- Reconvergent_fan-out wasDerivedFrom Reconvergent_fan-out?oldid=681489141.
- Reconvergent_fan-out isPrimaryTopicOf Reconvergent_fan-out.