Matches in DBpedia 2015-10 for { <http://dbpedia.org/resource/PowerPC_e500> ?p ?o }
Showing triples 1 to 56 of
56
with 100 triples per page.
- PowerPC_e500 abstract "The PowerPC e500 is a 32-bit Power Architecture-based microprocessor core from Freescale Semiconductor. The core is compatible with the older PowerPC Book E specification as well as the Power ISA v.2.03. It has a dual issue, seven-stage pipeline with FPUs (from version 2 onwards), 32/32 KiB data and instruction L1 caches and 256, 512 or 1024 KiB L2 frontside cache. Speeds range from 533 MHz up to 1.5 GHz, and the core is designed to be highly configurable and meet the specific needs of embedded applications with features like multi-core operation interface for auxiliary application processing units (APU). e500 powers the high-performance PowerQUICC III system on a chip (SoC) network processors and they all share a common naming scheme, MPC85xx. Freescale's new QorIQ is the evolutionary step from PowerQUICC III and will also be based on e500 cores.".
- PowerPC_e500 wikiPageExternalLink E500CORERM.pdf.
- PowerPC_e500 wikiPageExternalLink powerquicc.
- PowerPC_e500 wikiPageID "10981835".
- PowerPC_e500 wikiPageLength "4418".
- PowerPC_e500 wikiPageOutDegree "31".
- PowerPC_e500 wikiPageRevisionID "662372268".
- PowerPC_e500 wikiPageWikiLink 32-bit.
- PowerPC_e500 wikiPageWikiLink AltiVec.
- PowerPC_e500 wikiPageWikiLink Board_support_package.
- PowerPC_e500 wikiPageWikiLink CPU_cache.
- PowerPC_e500 wikiPageWikiLink Category:Freescale_microprocessors.
- PowerPC_e500 wikiPageWikiLink Category:PowerPC_microprocessors.
- PowerPC_e500 wikiPageWikiLink Embedded_system.
- PowerPC_e500 wikiPageWikiLink Floating-point_unit.
- PowerPC_e500 wikiPageWikiLink Floating_point_unit.
- PowerPC_e500 wikiPageWikiLink Freescale_Semiconductor.
- PowerPC_e500 wikiPageWikiLink Hardware_virtualization.
- PowerPC_e500 wikiPageWikiLink Hypervisor.
- PowerPC_e500 wikiPageWikiLink Instruction_pipeline.
- PowerPC_e500 wikiPageWikiLink Microprocessor.
- PowerPC_e500 wikiPageWikiLink Multi-core_(computing).
- PowerPC_e500 wikiPageWikiLink Multi-core_processor.
- PowerPC_e500 wikiPageWikiLink Network_processor.
- PowerPC_e500 wikiPageWikiLink Platform_virtualization.
- PowerPC_e500 wikiPageWikiLink PowerPC_e200.
- PowerPC_e500 wikiPageWikiLink PowerPC_e5500.
- PowerPC_e500 wikiPageWikiLink PowerQUICC.
- PowerPC_e500 wikiPageWikiLink Power_Architecture.
- PowerPC_e500 wikiPageWikiLink QorIQ.
- PowerPC_e500 wikiPageWikiLink System_on_a_chip.
- PowerPC_e500 wikiPageWikiLinkText "Power Architecture e500mc".
- PowerPC_e500 wikiPageWikiLinkText "PowerPC e500".
- PowerPC_e500 wikiPageWikiLinkText "PowerPCSPE".
- PowerPC_e500 wikiPageWikiLinkText "e500 core".
- PowerPC_e500 wikiPageWikiLinkText "e500 core(s)".
- PowerPC_e500 wikiPageWikiLinkText "e500".
- PowerPC_e500 wikiPageWikiLinkText "e500-mc core".
- PowerPC_e500 wikiPageWikiLinkText "e500-mc".
- PowerPC_e500 wikiPageWikiLinkText "e500mc core".
- PowerPC_e500 hasPhotoCollection PowerPC_e500.
- PowerPC_e500 wikiPageUsesTemplate Template:Motorola_processors.
- PowerPC_e500 wikiPageUsesTemplate Template:Power_Architecture.
- PowerPC_e500 wikiPageUsesTemplate Template:Reflist.
- PowerPC_e500 subject Category:Freescale_microprocessors.
- PowerPC_e500 subject Category:PowerPC_microprocessors.
- PowerPC_e500 hypernym Core.
- PowerPC_e500 type Place.
- PowerPC_e500 comment "The PowerPC e500 is a 32-bit Power Architecture-based microprocessor core from Freescale Semiconductor. The core is compatible with the older PowerPC Book E specification as well as the Power ISA v.2.03. It has a dual issue, seven-stage pipeline with FPUs (from version 2 onwards), 32/32 KiB data and instruction L1 caches and 256, 512 or 1024 KiB L2 frontside cache.".
- PowerPC_e500 label "PowerPC e500".
- PowerPC_e500 sameAs PowerPC_e500.
- PowerPC_e500 sameAs m.02qx4pg.
- PowerPC_e500 sameAs Q7236216.
- PowerPC_e500 sameAs Q7236216.
- PowerPC_e500 wasDerivedFrom PowerPC_e500?oldid=662372268.
- PowerPC_e500 isPrimaryTopicOf PowerPC_e500.