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- High-speed_transceiver_logic abstract "High-speed transceiver logic or HSTL is a technology-independent standard for signaling between integrated circuits. The nominal signaling range is 0 V to 1.5 V, though variations are allowed, and signals may be single-ended or differential. It is designed for operation beyond 180 MHz.The following classes are defined by standard EIA/JESD8-6 from EIA/JEDEC:Class I (unterminated, or symmetrically parallel terminated)Class II (series terminated)Class III (asymmetrically parallel terminated)Class IV (asymmetrically double parallel terminated)Note: Symmetric parallel termination means that the termination resistor at the load is connected to half the output buffer's supply voltage. Double parallel termination means that parallel termination resistors are fitted at both ends of the transmission line.".
- High-speed_transceiver_logic wikiPageID "711710".
- High-speed_transceiver_logic wikiPageLength "1342".
- High-speed_transceiver_logic wikiPageOutDegree "6".
- High-speed_transceiver_logic wikiPageRevisionID "604419570".
- High-speed_transceiver_logic wikiPageWikiLink Category:Digital_electronics.
- High-speed_transceiver_logic wikiPageWikiLink Category:JEDEC_standards.
- High-speed_transceiver_logic wikiPageWikiLink Electronic_Industries_Alliance.
- High-speed_transceiver_logic wikiPageWikiLink Integrated_circuit.
- High-speed_transceiver_logic wikiPageWikiLink JEDEC.
- High-speed_transceiver_logic wikiPageWikiLink Stub_Series_Terminated_Logic.
- High-speed_transceiver_logic wikiPageWikiLinkText "HSTL".
- High-speed_transceiver_logic wikiPageWikiLinkText "High-speed transceiver logic".
- High-speed_transceiver_logic hasPhotoCollection High-speed_transceiver_logic.
- High-speed_transceiver_logic wikiPageUsesTemplate Template:Electronics-stub.
- High-speed_transceiver_logic wikiPageUsesTemplate Template:Refimprove.
- High-speed_transceiver_logic wikiPageUsesTemplate Template:Reflist.
- High-speed_transceiver_logic subject Category:Digital_electronics.
- High-speed_transceiver_logic subject Category:JEDEC_standards.
- High-speed_transceiver_logic hypernym Standard.
- High-speed_transceiver_logic type Article.
- High-speed_transceiver_logic type Work.
- High-speed_transceiver_logic type Article.
- High-speed_transceiver_logic comment "High-speed transceiver logic or HSTL is a technology-independent standard for signaling between integrated circuits. The nominal signaling range is 0 V to 1.5 V, though variations are allowed, and signals may be single-ended or differential.".
- High-speed_transceiver_logic label "High-speed transceiver logic".
- High-speed_transceiver_logic sameAs m.034x1v.
- High-speed_transceiver_logic sameAs HSTL.
- High-speed_transceiver_logic sameAs Q5754733.
- High-speed_transceiver_logic sameAs Q5754733.
- High-speed_transceiver_logic wasDerivedFrom High-speed_transceiver_logic?oldid=604419570.
- High-speed_transceiver_logic isPrimaryTopicOf High-speed_transceiver_logic.