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- Cray_T3E abstract "The Cray T3E was Cray Research's second-generation massively parallel supercomputer architecture, launched in late November 1995. The first T3E was installed at the Pittsburgh Supercomputing Center in 1996. Like the previous Cray T3D, it was a fully distributed memory machine using a 3D torus topology interconnection network. The T3E initially used the DEC Alpha 21164 (EV5) microprocessor and was designed to scale from 8 to 2,176 Processing Elements (PEs). Each PE had between 64 MB and 2 GB of DRAM and a 6-way interconnect router with a payload bandwidth of 480 MB/s in each direction. Unlike many other MPP systems, including the T3D, the T3E was fully self-hosted and ran the UNICOS/mk distributed operating system with a GigaRing I/O subsystem integrated into the torus for network, disk and tape I/O.The original T3E (retrospectively known as the T3E-600) had a 300 MHz processor clock. Later variants, using the faster 21164A (EV56) processor, comprised the T3E-900 (450 MHz), T3E-1200 (600 MHz), T3E-1200E (with improved memory and interconnect performance) and T3E-1350 (675 MHz). The T3E was available in both air-cooled (AC) and liquid-cooled (LC) configurations. AC systems were available with 16 to 128 user PEs, LC systems with 64 to 2048 user PEs.A 1480-processor T3E-1200 was the first supercomputer to achieve a performance of more than 1 teraflops running a computational science application, in 1998. After Cray Research was acquired by Silicon Graphics in February 1996, development of new Alpha-based systems was stopped. While providing the -900, -1200 and -1200E upgrades to the T3E, in the long term Silicon Graphics intended Cray T3E users to migrate to the Origin 3000, a MIPS-based distributed shared memory computer, introduced in 2000. However, the T3E continued in production after SGI sold the Cray business the same year.".
- Cray_T3E thumbnail T3E-900t.jpg?width=300.
- Cray_T3E wikiPageExternalLink perf1200.html.
- Cray_T3E wikiPageExternalLink t3e880.html.
- Cray_T3E wikiPageExternalLink 4609.
- Cray_T3E wikiPageID "2662030".
- Cray_T3E wikiPageLength "3058".
- Cray_T3E wikiPageOutDegree "24".
- Cray_T3E wikiPageRevisionID "540573995".
- Cray_T3E wikiPageWikiLink Alpha_21164.
- Cray_T3E wikiPageWikiLink Category:1995_introductions.
- Cray_T3E wikiPageWikiLink Category:Cray_products.
- Cray_T3E wikiPageWikiLink Category:Supercomputers.
- Cray_T3E wikiPageWikiLink Computational_science.
- Cray_T3E wikiPageWikiLink Cray.
- Cray_T3E wikiPageWikiLink Cray_Research.
- Cray_T3E wikiPageWikiLink Cray_T3D.
- Cray_T3E wikiPageWikiLink DRAM.
- Cray_T3E wikiPageWikiLink Digital_Equipment_Corporation.
- Cray_T3E wikiPageWikiLink Distributed_operating_system.
- Cray_T3E wikiPageWikiLink Distributed_shared_memory.
- Cray_T3E wikiPageWikiLink Dynamic_random-access_memory.
- Cray_T3E wikiPageWikiLink FLOPS.
- Cray_T3E wikiPageWikiLink Hertz.
- Cray_T3E wikiPageWikiLink History_of_supercomputing.
- Cray_T3E wikiPageWikiLink MHz.
- Cray_T3E wikiPageWikiLink MIPS_architecture.
- Cray_T3E wikiPageWikiLink MIPS_instruction_set.
- Cray_T3E wikiPageWikiLink Massively_parallel.
- Cray_T3E wikiPageWikiLink Massively_parallel_(computing).
- Cray_T3E wikiPageWikiLink Microprocessor.
- Cray_T3E wikiPageWikiLink Origin_3000.
- Cray_T3E wikiPageWikiLink Pittsburgh_Supercomputing_Center.
- Cray_T3E wikiPageWikiLink SGI_Origin_3000_and_Onyx_3000.
- Cray_T3E wikiPageWikiLink Silicon_Graphics.
- Cray_T3E wikiPageWikiLink Teraflops.
- Cray_T3E wikiPageWikiLink Torus.
- Cray_T3E wikiPageWikiLink UNICOS.
- Cray_T3E wikiPageWikiLink File:Processor_board_cray-2_hg.jpg.
- Cray_T3E wikiPageWikiLink File:T3E-900t.jpg.
- Cray_T3E wikiPageWikiLinkText "576 PE Cray T3E-1200E".
- Cray_T3E wikiPageWikiLinkText "Cray T3E".
- Cray_T3E wikiPageWikiLinkText "T3E".
- Cray_T3E wikiPageWikiLinkText "T3E-600".
- Cray_T3E hasPhotoCollection Cray_T3E.
- Cray_T3E wikiPageUsesTemplate Template:Cray_computers.
- Cray_T3E subject Category:1995_introductions.
- Cray_T3E subject Category:Cray_products.
- Cray_T3E subject Category:Supercomputers.
- Cray_T3E hypernym Research.
- Cray_T3E type Organisation.
- Cray_T3E type Class.
- Cray_T3E type Product.
- Cray_T3E type Supercomputer.
- Cray_T3E comment "The Cray T3E was Cray Research's second-generation massively parallel supercomputer architecture, launched in late November 1995. The first T3E was installed at the Pittsburgh Supercomputing Center in 1996. Like the previous Cray T3D, it was a fully distributed memory machine using a 3D torus topology interconnection network. The T3E initially used the DEC Alpha 21164 (EV5) microprocessor and was designed to scale from 8 to 2,176 Processing Elements (PEs).".
- Cray_T3E label "Cray T3E".
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E sameAs m.07w5v_.
- Cray_T3E sameAs Q1139187.
- Cray_T3E sameAs Q1139187.
- Cray_T3E sameAs Cray_T3E.
- Cray_T3E wasDerivedFrom Cray_T3E?oldid=540573995.
- Cray_T3E depiction T3E-900t.jpg.
- Cray_T3E isPrimaryTopicOf Cray_T3E.